FPGA chips are coming on fast in the race to accelerate AI | VentureBeat
Deep Learning And The Future
DARPA asks industry for SWaP-optimized machine learning real-time ASICs able to learn from data | Military Aerospace
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Google AI Blog: Chip Design with Deep Reinforcement Learning
Intel Speeds AI Development, Deployment and Performance with New Class of AI Hardware from Cloud to Edge | Business Wire
My take on the Gartner Hype Cycle | by Jens Møllerhøj | Medium
Easing the Effort: Mipsology Accelerates ML with Zebra FPGA IP - News
How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices - Blog - Company - Aldec
Lessons Learned from Deploying Deep Learning at Scale
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Deep Neural Network ASICs The Ultimate Step-By-Step Guide: Blokdyk, Gerardus: 9780655403975: Amazon.com: Books
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices - Blog - Company - Aldec
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
ASIC Design Services | Microsemi
Deep Learning Accelerators Foundation IP| DesignWare IP| Synopsys
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Drilling Into Microsoft's BrainWave Soft Deep Learning Chip
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Are ASIC Chips The Future of AI?
AI 2.0 - Episode #1, Introduction | Cisco Tech Blog
